Static Timing Analysis Jobs In Mexico - 43 Job Positions Available

This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the

North American Production Sharing, Inc. is seeking an ASIC Timing Engineer to drive static timing analysis across mobile, compute, and IoT markets. You will work with multiple design teams, including outside vendors, to ensure timing closure and robust flows. The role

Overview As a Physical Design Engineer, you will play a pivotal role in shaping the next generation of custom IP and SoC designs at Intel. Your work will directly influence the cutting‑edge technology that powers our

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots,

Be part of a new VLSI Design Center in Tijuana. We are hiring highly skilled engineers to join our teams in the following areas: - Static Timing Analysis (STA) - Physical Design - RTL Design - Design Verification -

Número de Empleo :42850 Grupo : Electronics División : Electronics Monterrey Tipo de trabajo : Senior Systems Engineer Localidad : MEX Descripción del grupo Las tecnologías ADAS de Magna están dando forma a un futuro de

We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver

The candidate will work closely with the San Diego DTech (Design Technology) methodology team. The candidate will help to develop static timing analysis and power/timing optimization methodologies, will work with vendors such as Synopsys and Cadence to define and validate

We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver

Company QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area ASICS Engineering Role Overview About the Role As a member of the methodology/PPA team, you will work closely with various core teams to enable a

Job Details Job Description: As a Physical Design Engineer, you will play a pivotal role in shaping the next generation of custom IP and So C designs at Intel. Your work will directly influence the cutting‑edge

Position Summary We are seeking a Software Automotive Engineer with strong expertise in Basic Software (BSW) and Real-Time Operating System (RTOS) integration for next-generation electrified propulsion systems. The role focuses on architecture, configuration, integration, and validation

North American Production Sharing de México, S.A. de C.V. is seeking a candidate to develop methodologies for static timing analysis and power/timing optimization. The role involves close collaboration with the San Diego DTech team and support for design teams with

Our vision is to transform how the world uses information to enrich life for _all_ . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence,

Our vision is to transform how the world uses information to enrich life for _all _ . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into

Company :QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area :Engineering Group, Engineering Group ASICS Engineering General Summary : Minimum Qualifications :- Bachelors degree in Science, Engineering, or related field. Responsibilities :- Collaborate with design