Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: The Product Development and Test Engineering group is responsible for Design validation, characterization, and production deployment of multiple leading-edge
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: The Product Development and Test Engineering group is responsible for Design validation, characterization, and production deployment of multiple leading-edge
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: The Product Development and Test Engineering group is responsible for Design validation, characterization, and production deployment of multiple leading-edge
Intel is looking for a motivated Engineer Intern in Guadalajara, Mexico. Youll work on next-gen high-speed I/O technologies, developing automated workflows for PCIe channel simulations. This role requires pursuing a degree in Electronics or Electrical Engineering
Job DetailsThis position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be
Global Connect Technologies in Mexico is seeking an experienced Integrated Circuit Package Design Engineer to design complex flip-chip-BGA packages for high-speed SerDes and high-power delivery. You will work closely with a worldwide R&D team to develop high-performance
Link-Worldwide is seeking an engineer for the Post Silicon Engineering group in Tijuana, Mexico. This role involves developing test solutions for SOCs, optimizing design parameters, and collaborating with cross-functional teams on chip/circuit bring-up. The ideal candidate
Link-Worldwide in Tijuana is seeking candidates for a role focused on package design, specifically in DDR and SerDes interfaces. Responsibilities include performing analysis and providing guidelines for design. The ideal candidate will have over 3 years of
Link-Worldwide in Tijuana, Baja California is seeking an experienced engineer to perform package extraction for DDR/SerDes related design. Responsibilities include system-level analysis and developing design automation processes. The ideal candidate will have a Masters degree, 3+ years
Overview Qualcomm in Tijuana is seeking an experienced hardware engineer to join the Post Silicon Engineering group. Responsibilities Develop test methodologies for high-speed SERDES interfaces, ensuring optimal design parameters and operational compliance. Troubleshoot and resolve customer issues
Link-Worldwide in Tijuana is looking for a candidate for a package design role focused on DDR and SerDes interfaces. The ideal applicant will have over 3 years of experience with mobile standards and proficiency in various simulation
Overview Link-Worldwide in Tijuana is seeking candidates for a role focused on package design, specifically in DDR and SerDes interfaces. Responsibilities Perform analysis and provide guidelines for design. Qualifications Have over 3 years of experience with mobile
Link-Worldwide in Tijuana is seeking a Post Silicon Engineering role focusing on high-speed SERDES interfaces testing. Candidates should have a Bachelors degree and at least 4 years of related experience. The role involves developing test methodologies, conducting
Intel Corporation is seeking a motivated Engineer Intern in Guadalajara to support next-generation high-speed I/O technologies. This role includes developing automated workflows and collaborating with engineering teams to enhance server platform readiness.The ideal candidate is pursuing
Job Title: Integrated Circuit Package Design Engineer Job Description We are seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a
Job Title: Integrated Circuit Package Design Engineer Job Description We are seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a
Design complex flip-chip-BGA packages for high-speed SerDes and high-power delivery needs. Collaborate with the worldwide R...
Design complex flip-chip-BGA packages for high-speed SerDes and high-power delivery needs. Collaborate with the worldwide R&D team to develop high-performance package designs for ASICs used in AI, networking, HPC, and 5G base stations. Determine the necessary package
8+ years of experience in flip-chip-BGA package design with high-speed SerDes (BSEE or similar field) or 6+ years of experience with MSEE or similar field. Experience with Cadence APD (Allegro Package Designer) or equivalent tools. Knowledge of
Kafka Streams Developer Sr. (Java / Event Streaming) Modalidad híbrida | Lomas de Chapultepec, CDMX Experiencia requerida: 3 a 4 años Inglés: Intermedio avanzado (B2) Objetivo del Puesto: Buscamos un(a) Kafka Streams Developer con sólida experiencia