Serdes Jobs In Mexico - 76 Job Positions Available

Intel is looking for a motivated Engineer Intern in Guadalajara, Mexico. Youll work on next-gen high-speed I/O technologies, developing automated workflows for PCIe channel simulations. This role requires pursuing a degree in Electronics or Electrical Engineering

Job DetailsThis position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be

Global Connect Technologies in Mexico is seeking an experienced Integrated Circuit Package Design Engineer to design complex flip-chip-BGA packages for high-speed SerDes and high-power delivery. You will work closely with a worldwide R&D team to develop high-performance

Overview Link-Worldwide in Tijuana is seeking candidates for a role focused on package design, specifically in DDR and SerDes interfaces. Responsibilities Perform analysis and provide guidelines for design. Qualifications Have over 3 years of experience with mobile

Link-Worldwide in Tijuana is looking for a candidate for a package design role focused on DDR and SerDes interfaces. The ideal applicant will have over 3 years of experience with mobile standards and proficiency in various simulation

Job Details:Job Description:This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to

Intel Corporation is seeking a motivated Engineer Intern in Guadalajara to support next-generation high-speed I/O technologies. This role includes developing automated workflows and collaborating with engineering teams to enhance server platform readiness. The ideal candidate is

Overview Qualcomm in Tijuana is seeking an experienced hardware engineer to join the Post Silicon Engineering group. Responsibilities Develop test methodologies for high-speed SERDES interfaces, ensuring optimal design parameters and operational compliance. Troubleshoot and resolve customer issues

Kafka Streams Developer Sr. (Java / Event Streaming) Modalidad híbrida | Lomas de Chapultepec, CDMX Experiencia requerida: 3 a 4 años Inglés: Intermedio avanzado (B2) Objetivo del Puesto: Buscamos un(a) Kafka Streams Developer con sólida experiencia

Design complex flip-chip-BGA packages for high-speed SerDes and high-power delivery needs. Collaborate with the worldwide R&D team to develop high-performance package designs for ASICs used in AI, networking, HPC, and 5G base stations. Determine the necessary package

Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob Area:Engineering Group, Engineering Group Hardware EngineeringGeneral Summary:This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip). Main responsibilities

CompanyQUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob AreaEngineering Group Hardware EngineeringGeneral SummaryThis position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip). Main responsibilities include defining

- 8+ years of experience in flip-chip-BGA package design with high-speed SerDes (BSEE or similar field) or 6+ years of experience with MSEE or similar field. - Experience with Cadence APD (Allegro Package Designer) or equivalent tools.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.The Senior Test Engineer must have the ability to be part of a focused, high-energy team that

Job Title: Integrated Circuit Package Design EngineerJob DescriptionWe are seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a worldwide R&D

Cadence is seeking a Senior Test Engineer based in Guadalajara, Mexico. The role involves developing hardware diagnostic solutions, driving innovative testing processes, and collaborating with contract manufacturers. The ideal candidate will possess a BA/BS in Computer

The responsibilities will include but not be limited to the following : - Perform package extraction for the time domain and frequency domain analysis - Perform system-level analysis for DDR, SerDes & Mixed signal interfaces : -