Job Details: Job Description: As a Silicon Design – Flows and Methodology Intern, you will play an integral role in contributing to the development and documentation of tools, flows, and methodologies that drive silicon design innovation. You will
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives communication
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: We are seeking motivated Engineer and Senior Engineer candidates to join our Pre-Silicon and Post-Silicon SoC Verification team. In
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Job Overview We are seeking motivated Engineer and Senior Engineer candidates to join our Pre-Silicon and Post-Silicon SoC Verification
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: SoC Design & Synthesis Engineer This role focuses on synthesizing large‑scale SoC RTL designs into high‑quality gate‑level netlists that are ready for
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives communication
Job Details: Job Description: We are seeking a passionate and driven professional with a strong interest in building emulation and FPGA models and solutions from RTL design using synthesis, partitioning, and routing tools. Please consider that this is
About The Opportunity We are building a rigorous, verifiable evaluation suite of Terminal-Bench tasks designed to test the limits of large language models on multilingual software challenges. Our goal is to measure multilingual robustness across prompt
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomms Silicon Validation team is part of the central SoC digital hardware organization responsible for the overall quality of
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute, Automotive and
Company:Qualcomm Intl Inc., Mexico Branch Office Job Area:Information Technology Group, Information Technology Group IT Engineering General Summary: We are seeking a seasoned professional to support large-scale hardware engineering environments, enabling efficient, reliable, and scalable source code
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Join QCOM Technologies Inc vibrant Global CAD team pushing the limits of design solutions for the Snapdragon chips powering billions
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomm Multimedia Validation and Integration team is a part of the Visual-Technology team and is responsible for the overall
GMV is expanding its GNSS-User Segment Navigation team in Castilla-La Mancha, Spain. Revise detenidamente toda la documentación de la solicitud antes de hacer clic en el botón de solicitar al final de esta descripción. You will
North American Production Sharing, Inc. seeks an experienced ASIC engineer in Tijuana to join a fast-paced SoC team working on RTL design, verification and high-performance ASIC development for sub-5nm nodes. Ideal candidates have 5-10 years in ASIC design with
QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA is seeking an ASIC engineer to contribute to RTL design, verification, and integration for sub‐5nm SoCs in mobile, AI, and XR spaces. You will work within a fast-paced team on
Intel in Guadalajara, Mexico, seeks a Physical Design Engineer to drive RTL-to-GDS implementation for custom IP and SoC designs. You will execute end-to-end physical design flows, including synthesis, floor planning, placement, routing, and timing closure, while optimizing power, performance, and
Job Details : Were looking for a hands-on SoC Design Verification Engineer to drive verification for complex SoC/IP blocks. You will own verification planning, UVM testbench development, test content creation (directed and constrained-random), coverage closure, and debug
# Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA # Job Area: Engineering Group, Engineering Group \u003e ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what\u s possible to
Intel is seeking a passionate hardware verification professional to build emulation and FPGA models from RTL design, using synthesis, partitioning, and routing tools. This 2-year contract role is based in Guadalajara and supports pre- and post-silicon validation and