Job Details: Job Description: As a Physical Design Engineer, you will play a pivotal role in shaping the next generation of custom IP and SoC designs at Intel. Your work will directly influence the cutting-edge technology that powers
Job Details: Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be
A leading tech company in Mexico is seeking a Senior CPU Design Engineer to design and implement high-performance execution units in CPU. This role involves optimizing for power, performance, and area (PPA). You will collaborate with cross-functional teams,
A leading tech company is looking for a CPU Design Engineer in Mexico, Jalisco, Región Centro. This role involves designing and implementing high-performance execution units in CPUs, working on microarchitecture, and collaborating with teams to meet power
Job Details: Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be
Job Details: Job Description: Intels Central Engineering Group is seeking a DDR/LPDDR Memory Subsystem Firmware Developer to design, develop, and validate DDR and LPDDR memory reference code for our next-generation products working at the critical hardware-software boundary,
A technology company is seeking a Physical Design Engineer in Guadalajara, Mexico, to optimize CPU power, performance, and area. Responsibilities include managing physical implementation from RTL to GDSII, working with RTL designers on timing and power efficiency, and utilizing
QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA is seeking an ASIC engineer to contribute to RTL design, verification, and integration for sub‑5nm SoCs in mobile, AI, and XR spaces. You will work within a fast-paced team on
Intel in Guadalajara, Mexico, seeks a Physical Design Engineer to drive RTL-to-GDS implementation for custom IP and SoC designs.You will execute end-to-end physical design flows, including synthesis, floor planning, placement, routing, and timing closure, while optimizing power, performance, and area.Collaboration
Job Details: Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be
We Are : At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in
Job Overview This position requires candidates to upload a resume in English; multiple versions may be submitted, but at least one English version is required to be considered for this position. We are looking for a
Job Details Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be
Qualcomm is seeking an ASIC Engineer in Tijuana, Baja California to design and optimize high performance, low power products. You will perform RTL design and collaborate across teams to ensure successful implementation of integrated circuits. The ideal candidate should
Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area: Engineering Group, Engineering Group ASICS Engineering General Summary: We are seeking motivated Engineer and Senior Engineer candidates to join our Pre‑Silicon and Post‑Silicon SoC Verification
Company :QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area :Engineering Group, Engineering Group ASICS Engineering General Summary : As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences
This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the market.Its
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob Area:Engineering Group, Engineering Group ASICS EngineeringGeneral Summary:SoC Design & Synthesis EngineerThis role focuses on synthesizing large‐scale SoC RTL designs into high‐quality gate‐level netlists that are ready for Place & Route. Responsibilities
Job Overview : - Design adaptive power management controller, on-chip sensor controller and digital power meter. - Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP
We are seeking a CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance execution units in CPU, optimizing for power, performance, and area (PPA). You will work