Position Overview This role requires candidates to upload a resume in English and will only consider an English version of the resume. Responsibilities Perform functional logic verification of an integrated SoC to ensure design meets specifications.
Overview This position requires candidates to upload an English resume. An English resume is required to be considered for this position. Responsibilities Perform functional logic verification of an integrated SoC to ensure design meets specifications. Define
OverviewThis position requires candidates to upload an English resume. An English resume is required to be considered for this position.ResponsibilitiesPerform functional logic verification of an integrated SoC to ensure design meets specifications.Define and develop scalable and
About DeepX Co., Ltd.DEEPX is a forward‐thinking Series D startup architecting the infrastructure for the Physical AI era. By delivering the worlds most energy‐efficient NPU technology, the company addresses critical power and heat challenges of Generative
Role OverviewDEEPX is seeking a highly skilled GPU Integration Engineer to join our SoC Development team. In this role, you will be responsible for the seamless integration of GPU IPs into our AI Inference SoCs. You
About DeepX Co., Ltd. DEEPX is a forward‐thinking Series D startup architecting the infrastructure for the Physical AI era. By delivering the worlds most energy‐efficient NPU technology, the company addresses critical power and heat challenges of
Role Overview DEEPX is seeking a highly skilled GPU Integration Engineer to join our So C Development team. In this role, you will be responsible for the seamless integration of GPU IPs into our AI Inference
We are seeking a Senior CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance execution units in CPU, optimizing for power, performance, and area (PPA). You
We are seeking a CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance execution units in CPU, optimizing for power, performance, and area (PPA). You will
ResponsibilitiesDefine and develop comprehensive verification plans for complex SoC Interconnects and Bus structures based on architectural specifications.Build and maintain advanced verification environments using UVM (Universal Verification Methodology) and SystemVerilog.Verify high-speed bus protocols (AMBA AXI, CHI, ACE)