Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: SoC Design & Synthesis Engineer This role focuses on synthesizing large‑scale SoC RTL designs into high‑quality gate‑level netlists that are ready
Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area: ASICS Engineering General Summary: We are looking for talented and ambitious individuals to join the TECHIP team. The candidate should have strong IP modeling, Char tool
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob Area:Engineering Group, Engineering Group ASICS EngineeringGeneral Summary:We are looking for talented and ambitious individuals to join the TECHIP team. The candidate should have strong IP modeling, Char tool know-how
Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area: ASICS Engineering General Summary: We are looking for talented and ambitious individuals to join the TECHIP team. The candidate should have strong IP modeling, Char tool
ASIC Design Engineer GMV viñuelas, castilla la mancha, Spain Descripción del trabajo ASIC Design Engineer | Job DetailsAre you looking for an innovative and consolidated place for your professional development? GMV is an experienced technology group and…We are expanding our
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver high-performance,
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver high-performance,
Company QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area ASICS Engineering General Summary So C Design & Synthesis Engineer Role Description This role focuses on synthesizing large‑scale So C RTL designs into high‑quality gate‑level netlists that
This role focuses on synthesizing large ‑ scale So C RTL designs into high ‑ quality gate ‑ level netlists that are ready for Place & Route. Responsibilities include owning all synthesis inputs, executing multi ‑
As a leading technology innovator, The Company pushes the boundaries of whats possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As an ASIC Engineer, you
The Company in Tijuana is seeking an ASIC Engineer to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, low power products. You will collaborate with RTL, DFT, Synthesis and
As a leading technology innovator, The Company pushes the boundaries of whats possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As an ASIC Engineer, you
As a leading technology innovator, The Company pushes the boundaries of what’s possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As an ASIC Engineer, you
Company QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area ASICS Engineering General Summary We are looking for talented and ambitious individuals to join the TECHIP team. The candidate should have strong IP modeling, Char tool
CompanyQUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob AreaEngineering Group, Engineering Group ASICS EngineeringGeneral SummaryWe are looking for talented and ambitious individuals to join the TECHIP team. The candidate should have strong IP modeling, Char tool know-how
North American Production Sharing, Inc. seeks an ASIC design engineer to synthesize large-scale SoC RTL into gate-level netlists and own multi-stage synthesis flows, ensuring PD handoff readiness.You will optimize PPA, analyze timing constraints (SDC), and support functional ECOs
Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring
As a leading technology innovator, The Company pushes the boundaries of whats possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As an ASIC Engineer, you
Company QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area Engineering Group, Engineering Group ASICS Engineering General Summary SoC Design & Synthesis Engineer Role Description This role focuses on synthesizing large‑scale SoC RTL designs into high‑quality gate‑level
QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA seeks a talented ASIC/SoC engineer with strong IP modeling, Liberty-based timing and power modeling knowledge. The role emphasizes front-end Verilog, RTL concepts, and automation across multi-site teams to drive characterization