Job Details: Job Description: The Physical Design Engineer (EM/IR Closure Engineer) is a hands-on individual contributor responsible for block-level and subsystem-level EM/IR analysis and closure. The role requires strong execution rigor, ownership of reliability closure for
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives communication and
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives communication and
Job Details: Job Description: As a Physical Design Engineer, you will play a pivotal role in shaping the next generation of custom IP and SoC designs at Intel. Your work will directly influence the cutting-edge technology that
This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the
You will be working with physical design team (and other teams) on timing closure, CAD teams, IP teams and Design Technology Teams for flow scripts/tools development and validation. - Responsible for Spice simulations (Hspice/Primesim/Finesim/AFS/Spectre) for PVT corners
ASSA ABLOY Global Solutions is seeking a Product Owner for their Fixed Infrastructure division. This role involves the product ownership of real-time location services (RTLS) hardware. The candidate will orchestrate multiple technology integrations and ensure development teams meet
Company QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Responsibilities Work with best-in-class methodologies, tools and implementation flows/technologies to evaluate process technology entitlement (PPAY) for SOC products at the block/IP-level and at system-level in advanced process technologies 5nm, 4nm
North American Production Sharing de México, S.A. de C.V. is seeking a skilled professional in semiconductor design. The ideal candidate will focus on low power digital ASIC design and collaborate with cross-functional teams to ensure effective
A technology company is seeking a Physical Design Engineer in Guadalajara, Mexico, to optimize CPU power, performance, and area. Responsibilities include managing physical implementation from RTL to GDSII, working with RTL designers on timing and power efficiency, and utilizing
Qualcomm Semiconductores y Sistemas Avanzados de Baja California is looking for an engineering professional to join the General CAD team, focusing on RTL-to-GDS solutions for Snapdragon chips. The position emphasizes improving synthesis and place-and-route methodologies, supporting design
This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the
Company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive
Minimum Qualifications Bachelor’s degree, master or Ph D in Electronics, Mechatronics, Robotics Engineering, Nanotechnology or similar. Graduated within the last 2 years from a bachelor’s degree, master’s degree, or Ph D program. Strong knowledge of electronics
A technology startup in Guadalajara, Mexico is looking for a Physical Design Engineer to optimize CPU power, performance, and area (PPA). The role involves physical implementation from RTL-to-GDSII, working closely with RTL designers to enhance efficiency. Candidates should have
Job Details:Job Description:The Physical Design Engineer (EM/IR Closure Engineer) is a hands-on individual contributor responsible for block-level and subsystem-level EM/IR analysis and closure.The role requires strong execution rigor, ownership of reliability closure for assigned blocks, and
Link-Worldwide, a leader in technology solutions based in Mexico, is seeking a candidate to drive innovation in chip design. You will engage with customers using Synopsys tools like RTL Architect and Fusion Compiler. A strong technical background and
The Advanced Manufacturing Engineering Specialist will lead and oversee multiple complex projects focused on optimizing material flow, material storage, and advanced manufacturing processes across multi-site operations. The specialist will interact directly with Design Engineering, Program Managers,
Minimum Qualifications Bachelor’s degree, master or PhD in Electronics, Mechatronics, Robotics Engineering, Nanotechnology or similar. Graduated within the last 2 years from a bachelor’s degree, master’s degree, or PhD program. Strong knowledge of electronics circuit concepts.
Job Description The Advanced Manufacturing Engineering Specialist will lead and oversee multiple complex projects focused on optimizing material flow, material storage, and advanced manufacturing processes across multi‑site operations. The specialist will interact directly with Design Engineering,