Job Details: Job Description: The Physical Design Engineer (EM/IR Closure Engineer) is a hands-on individual contributor responsible for block-level and subsystem-level EM/IR analysis and closure. The role requires strong execution rigor, ownership of reliability closure for
General Information Job Title Applications Engineer - 17504 Job ID 17504 Country Mexico City Zapopan Date Posted 13-May-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements Job Description
General Information Job Title Applications Engineer - 17506 Job ID 17506 Country Mexico City Zapopan Date Posted 13-May-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements Job Description
Link-Worldwide is looking for a dynamic IT Support professional in Mexico, Jalisco, to provide world-class technical support to Synopsys employees. The role involves assisting with hardware and software issues, maintaining data integrity, and managing IT assets.The ideal
Job Details: Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be
Job Title : Design Implementation Intern : Key Program Facts : - Program Length : 6 months - Location : Zapopan, Mexico - Working Model : In-office - Full-Time/Part-Time : Full-time - Start Date : Fall
We Are : At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip
Job Title : Pre-Silicon Verification Intern : Key Program Facts : - Program Length : 6 months - Location : Zapopan, Mexico - Working Model : In-office - Full-Time/Part-Time : Full-time - Start Date : Fall
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self‑driving cars to learning machines. We lead in chip design, verification, and
We are seeking a highly motivated and experienced Senior CPU Pre‑Silicon Verification Engineer to join our advanced CPU verification team. The role focuses on ensuring the functional correctness and robustness of CPU logic designs through state‑of‑the‑art
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver
Synopsys Inc in Mexico, Jalisco, seeks a member for their Customer Success Group. The role involves collaborating with R&D, developing technical solutions for customer needs, and enhancing the adoption of advanced technologies like RTL-to-GDSII. Ideal candidates will
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self‑driving cars to learning machines. We lead in chip design, verification, and
Job Description and Requirements At Synopsys, were at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. And were powering it all
Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to
# Welcome! # .# Job Details: # Job Description:This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of
# Welcome! # .# Job Details: # Job Description:This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of
Job Overview This position requires candidates to upload a resume in English; multiple versions may be submitted, but at least one English version is required to be considered for this position. We are looking for a
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver
Support emulation bring-up of CPU RTL on hardware emulation platforms, including design partitioning, clock domain handling, and memory/IO modeling. Develop and maintain testbench infrastructure, C/C++ DPI-based transactors, and speed bridges enabling emulation-based execution of firmware, bootloaders,