Responsibilities will include, but are not limited to: Architect, develop and coordinate verification flows/methodologies/automation solutions for scribe design specific simulation and physical verification methodologies. Collaborate with Process Integration, CAD and PDK teams to resolve physical verification rule
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# Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA # Job Area: Engineering Group, Engineering Group \u003e Failure Analysis Engineering General Summary: The responsibility of this position is to perform Failure Analysis of Semiconductor IC devices.