Company:Qualcomm Intl Inc., Mexico Branch Office Job Area:Information Technology Group, Information Technology Group IT Engineering General Summary: Qualcomm is seeking a Senior Storage & Backup engineer with 3 to 5 years of experience in operating and
The Engineering Lead Analyst is a senior level position responsible for leading a on IBM Mainframe platform, manages and maintains the storage infrastructure for mainframe systems, ensuring data integrity, availability, and performance.The overall objective of this
ASIC/Layout Design Engineer 1 Position Summary: The ASIC/Layout Design Engineer 1 position is responsible for performing basic physical design and layout activities within our semiconductor company. This position supports ASIC layout development, assists with physical verification,
About the Role: In this job you will focus on the leverage of the IBM IT solutions within the Latin America Region using the technical and communications skills to enable and influence IBM business partners and
DigitalOnUs by Tech Mahindra At DigitalOnUs by Tech Mahindra, we have a culture of driving positive change, celebrating each moment, and empowering all to Rise drives us to dream, do, and become more. By living our
The Mission Were looking for a Digital Illustrator who can help elevate the visual quality, consistency, and overall user experience of our digital products. This role goes beyond creating beautiful artwork. Youll help shape the visual
Teradata DBAHybrid (Ciudad de Mexico OR Guadalajara)FulltimeResponsibilitiesWork as part of Teradata database administration team to maintain Teradata DEV, UAT, PROD, COB environments.Monitor and maintain all Teradata infrastructure including backup servers, tape libraries and Datadomain servers.Coordinate with vendors on
ASIC/Layout Design Engineer 1 Position Summary :The ASIC/Layout Design Engineer 1 position is responsible for performing basic physical design and layout activities within our semiconductor company. This position supports ASIC layout development, assists with physical verification,