Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute, Automotive and IOT markets
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: SoC Design & Synthesis Engineer This role focuses on synthesizing large‑scale SoC RTL designs into high‑quality gate‑level netlists that are ready for Place
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Job Summary: As a member of the Qualcomm Standard Cell Design team, the candidate will be responsible for contributing to the
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: General Summary The RF Product Development and Test Engineering group develops test solutions for design verification and characterization of highly
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Join QCOM Technologies Inc vibrant Global CAD team pushing the limits of design solutions for the Snapdragon chips powering billions of
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: The RF Product Development and Test Engineering group develops test solutions for design verification and characterization of highly integrated RF
Company :QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area :Engineering Group, Engineering Group ASICS Engineering General Summary : Minimum Qualifications : - Bachelors degree in Science, Engineering, or related field. Responsibilities : - Collaborate with
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver high-performance, and power-efficient processors.Responsibilities- Own
Bachelors degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Masters degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver high-performance, and power-efficient processors. Responsibilities
Job DetailsJob Description: As a Physical Design Engineer, you will play a pivotal role in shaping the next generation of custom IP and SoC designs at Intel. Your work will directly influence the cutting‐edge technology that powers our products, driving
# Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA # Job Area: Engineering Group, Engineering Group \u003e ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what\u s possible to enable
Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area: ASICS Engineering General Summary: We are looking for talented and ambitious individuals to join the TECHIP team. The candidate should have strong IP modeling, Char tool
This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the market.
Company QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area ASICS Engineering General Summary So C Design & Synthesis Engineer Role Description This role focuses on synthesizing large‑scale So C RTL designs into high‑quality gate‑level netlists that are ready
Company QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area Engineering Group, Engineering Group ASICS Engineering General Summary SoC Design & Synthesis Engineer Role Description This role focuses on synthesizing large‑scale SoC RTL designs into high‑quality gate‑level netlists that
General Summary As a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute, Automotive and IOT markets. Responsibilities The candidate will work with best-in‑class methodologies, tools and technology to design innovative SOC
# Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA # Job Area: Engineering Group, Engineering Group \u003e ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what\u0027s possible to enable next-generation
This role focuses on synthesizing large ‑ scale So C RTL designs into high ‑ quality gate ‑ level netlists that are ready for Place & Route. Responsibilities include owning all synthesis inputs, executing multi ‑ stage
As a leading technology innovator, The Company pushes the boundaries of what’s possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As an ASIC Engineer, you