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Engineering Computer Simulations Jobs In Guerrero - 8 Job Positions Available

1 – 7 of 8 jobs

Overview Senior Design Verification Engineer - DFT Micron Technology is an integral leader in memory and storage solutions, transforming information into intelligence to enrich lives worldwide. Job Summary We are seeking a Design Verification Engineer to

Link-Worldwide  1 day ago

Frontier of On-device AI Semiconductors for Everyone, Everywhere. About DeepX Co., Ltd. DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era. By delivering the world’s most energy-efficient NPU technology, we

Link-Worldwide  1 day ago

Frontier of On-device AI Semiconductors for Everyone, Everywhere. About DeepX Co., Ltd. DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era.By delivering the worlds most energy-efficient NPU technology, we are

Link-Worldwide  22 hours ago

Frontier of On-device AI Semiconductors for Everyone, Everywhere. About DeepX Co., Ltd. DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era.By delivering the worlds most energy-efficient NPU technology, we are

Link-Worldwide  1 day ago

DeepX Co., Ltd. is a forward-thinking SeriesD startup.ResponsibilitiesDigital Circuit Design & Verification: develop testbenches and perform simulations using SystemVerilog/UVMVerification Planning & Execution: build verification environments and analyze functional coverageRTL Design Review & Debugging: analyze and fix design

Link-Worldwide  22 hours ago

DeepX Co., Ltd. is a forward-thinking SeriesD startup.ResponsibilitiesDigital Circuit Design & Verification: develop testbenches and perform simulations using SystemVerilog/UVMVerification Planning & Execution: build verification environments and analyze functional coverageRTL Design Review & Debugging: analyze and fix design

Link-Worldwide  22 hours ago

DeepX Co., Ltd. is a forward-thinking SeriesD startup. Responsibilities Digital Circuit Design & Verification: develop testbenches and perform simulations using SystemVerilog/UVM Verification Planning & Execution: build verification environments and analyze functional coverage RTL Design Review & Debugging:

Link-Worldwide  1 day ago

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