DDR Jobs In Mexico - 142 Job Positions Available

Job Details Job Description: Intels Central Engineering Group is seeking a DDR/LPDDR Memory Subsystem Firmware Developer to design, develop, and validate DDR and LPDDR memory reference code for our next-generation products working at the critical hardware-software boundary, writing

Micron Technology is seeking a Pathfinding Senior Design Layout Engineer to join its DDR Team in Guadalajara, Mexico. The role involves designing critical analog layouts and ensuring high-quality delivery across projects. The ideal candidate will possess a

This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SoCs (Systems on Chip). Main responsibilities include defining and executing test methodologies and characterization of high-speed SERDES interfaces such as

95% verbal and written). Work Experience: 1-3+ year of experience in related areas. (fresh graduates welcome to apply) Experience with Python/C# for test automation is required Masters Degree in Electrical/Computer Engineering or related field. Good understanding

Responsibilities include developing and executing characterization plans for High Speed IPs to optimize design parameters and validate electrical compliance, driving corresponding first silicon bring up & debug to qualify designs fabricated at external foundries and performing

North American Production Sharing, Inc. is seeking a Post Silicon Engineering specialist to define test methodologies and characterize high-speed SERDES interfaces for PCIe, USB3, UFS, DP, MIPI, and memory subsystems. The engineer will collaborate across IC

Micron Technology is seeking a Pathfinding Senior Design Layout Engineer to join its DDR Team in Guadalajara, Mexico. The role involves designing critical analog layouts and ensuring high-quality delivery across projects. The ideal candidate will possess a

Company QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area Engineering Group, Engineering Group Hardware Engineering General Summary This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs

# Pathfinding Senior Design Layout Engineer Tlaquepaque, Jalisco, Mexico Apply Now Find out how well you match with this job Job IDJR93766 Our vision is to transform how the world uses information to enrich life for

Job Details Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be

Plata is a high-tech financial platform poised to revolutionize how people interact with money through an easy-to-use, personalized, and trustworthy ecosystem. We bring inclusive access to premium financial products and best-in-class customer support to each and

Support emulation bring-up of CPU RTL on hardware emulation platforms, including design partitioning, clock domain handling, and memory/IO modeling. Develop and maintain testbench infrastructure, C/C++ DPI-based transactors, and speed bridges enabling emulation-based execution of firmware, bootloaders,

Responsibilities Lead emulation bring-up of CPU RTL on hardware emulation platforms, including design partitioning, clock domain handling, and memory/IO modeling. Develop and maintain testbench infrastructure, C/C++ DPI-based transactors, and speed bridges enabling emulation-based execution of firmware,

PROBEAS es una empresa líder de servicios de seguros en el sector cooperativo mexicano, protegiendo el patrimonio de nuestros aliados, con una larga historia de éxito y compromiso con sus empleados. El objetivo del Analista de