Req ID 88779 | MSSC Guadalupe, Mexico, ZF ENGINEERING AND SHARED SERVICES MONTERREY, S DE RL DE CV Job Description About the Team ZF is looking to hire a HW Electronics Engineer II to join our
Job Details: Job Description: The Physical Design Engineer (EM/IR Closure Engineer) is a hands-on individual contributor responsible for block-level and subsystem-level EM/IR analysis and closure. The role requires strong execution rigor, ownership of reliability closure for
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Join Qualcomm Technologies Inc GPU Compiler team to develop software solutions for the world class GPU products. Adreno GPU has been
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Join QCOM Technologies Inc vibrant Global CAD team pushing the limits of RTL2GDS solutions for the Snapdragon chips powering billions of
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives communication and data
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group Mechanical Engineering General Summary: The Product Development and Test Engineering group develops test solutions for design validation / characterization (NPI) and production (HVM)
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives communication and data
Company :QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area :Engineering Group, Engineering Group ASICS Engineering General Summary : As a DTCO and Timing Engineer , you will play a vital role in DTCO analysis targeting
Design complex flip-chip-BGA packages for high-speed SerDes and high-power delivery needs. Collaborate with the worldwide R...
Design complex flip-chip-BGA packages for high-speed SerDes and high-power delivery needs. Collaborate with the worldwide R&D team to develop high-performance package designs for ASICs used in AI, networking, HPC, and 5G base stations. Determine the necessary package
CompanyQUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob AreaEngineering Group, Engineering Group ASICS EngineeringGeneral SummaryAs a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute, Automotive and IOT marketsResponsibilitiesThe candidate will
We are looking for motivated engineers with Static timing analysis skill; good knowledge on timing convergence and corner definition in advanced tech nodes. If you have expertise in this area and are excited by driving leading
Link-Worldwide is seeking a Digital Verification Engineer in Tijuana, Mexico, focusing on Mixed-Signals IPs and ASICs for innovative power solutions. You will collaborate with international teams, ensuring high-volume launches of next-gen technologies. The ideal candidate will have a
Company :QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area :Engineering Group, Engineering Group ASICS Engineering General Summary : As a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute,
Frontier of On-device AI Semiconductors for Everyone, Everywhere.DeepX Co., Ltd. DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era.By delivering the worlds most energy-efficient NPU technology, we are solving the critical
Link-Worldwide in Tijuana, Baja California, is looking for a Digital Verification Engineer to oversee innovative mixed-signal IPs and ASICs in the 5G technology sector. This position emphasizes collaboration with international teams and managing the entire verification process. The
This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the
Minimum Qualifications : - Experience with 2.5D and 3D STCO and pathfinding. - Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. - Good knowledge
DeepX Co., Ltd. is seeking a qualified Digital Circuit Designer to develop and verify digital circuits. The role requires a bachelors degree in Electrical or Computer Engineering and at least 3 years of experience in the
Job Title: Integrated Circuit Package Design Engineer Job Description We are seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a