Support emulation bring-up of CPU RTL on hardware emulation platforms, including design partitioning, clock domain handling, and memory/IO modeling. Develop and maintain testbench infrastructure, C/C++ DPI-based transactors, and speed bridges enabling emulation-based execution of firmware, bootloaders,
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver
Create and utilize cutting-edge tools and methodologies to detect, analyze, and resolve digital logic bugs in advanced CPU designs. Develop and implement verification methodologies that enhance design correctness, streamlining verification cycles for improved efficiency. Manage and
Responsibilities Lead emulation bring-up of CPU RTL on hardware emulation platforms, including design partitioning, clock domain handling, and memory/IO modeling. Develop and maintain testbench infrastructure, C/C++ DPI-based transactors, and speed bridges enabling emulation-based execution of firmware,
AheadComputing Inc. in Guadalajara, México seeks an experienced CPU Design Verification Engineer to create and implement methodologies for digital logic bug resolution in advanced CPU designs. The role demands collaboration across teams to enhance design flows and
- Define system-level power management architecture and operating modes- Define CPU and cluster power states and their coordination mechanisms- Define reset flow architecture, including cold and warm reset sequencing and reset-power state interactions- Define PM policies,
A leading technology firm in Mexico is seeking a Formal Verification Engineer to leverage advanced techniques ensuring the performance of RISC-V cores. This role involves collaborating closely with architects and RTL engineers to develop innovative verification
We are seeking a Formal Verification Engineer to join our team. In this role, you will leverage advanced formal verification techniques to ensure the correctness and performance of high-end RISC‑V cores. You will collaborate closely with
A technology startup in Guadalajara, Mexico is looking for a Physical Design Engineer to optimize CPU power, performance, and area (PPA). The role involves physical implementation from RTL-to-GDSII, working closely with RTL designers to enhance efficiency.
AheadComputing Inc. in Guadalajara, Mexico is seeking a CPU Emulation Engineer to support hardware emulation platforms for CPU RTL. Ideal candidates will have a Bachelors or Masters degree in Computer Engineering or related fields and a minimum
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes.You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver high-performance,
AheadComputing Inc. in Guadalajara, México is seeking a senior engineer to lead the emulation bring-up of CPU RTL on hardware platforms.The successful candidate will develop testbench infrastructures and work collaboratively to resolve complex hardware/software issues.Qualifications include a